CMOS Transmission Gate Working

To study pass-transistor logic gates, we first discuss the CMOS Transmission Gate. The basic CMOS TG and its symbol are shown in Fig. 3.39(a) and (b), respectively. In Fig. 3.39(a), we find that the source terminals of a PMOS transistor and an NMOS transistor are tied together to form a single source of the complementary structure. Similarly, the drains are tied to form a single drain. However, the respective gates are left as independent. We will later find that these are the control terminals. The symbol shown in Fig. 3.39(b) indicates the bidirectional nature of TG.
Principles of Working of the CMOS TG

The CMOS Transmission Gate Working is explained as follows. Figure 3.40 shows a CMOS Transmission Gate in which GP (control terminal C′ of PMOS), is connected to +VDD. and GN (control terminal C of NMOS) is connected to –VSS, as shown. A positive voltage of value +VDD at the N substrate of a PMOS will keep it in the OFF-state. Similarly, a negative voltage of value –VSS at the P substrate of an NMOS will keep it in the OFF-state.
Now, to turn the transistors on, we apply control voltages that will neutralize effects of the supply voltages. Thus, we apply V′C = –VDD (≡ logic 0) to the PMOS transistor and VC = +VSS (≡ logic 1) to the NMOS transistor. These voltages cancel the effects of the supply voltages +VDD and –VSS, respectively, and the TG gets turned-on. The input voltage Vi will now flow through the TG to the load resistor RL. The advantages of the CMOS TG are:
1.    They are bidirectional, i.e., signal can flow in through the gate in either direction.
2.    The ON-resistance (resistance of the circuit when it is turned on) of the gate is low.
3.    The ON-resistance remains more or less constant. This is because, when the PMOS is ON, the NMOS is OFF, and vice versa. Therefore, the resistance of the parallel combination of the ON and OFF resistances is in effect the resistance of the ON-device only. Hence, it is almost a constant.

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