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Saturday, 2 November 2019

Instruction Set of 8086 with Examples

Instruction Set of 8086:


An instruction defines the type of the operation. A group of instructions are arranged in a pre defined manner to perform an operation. In 8086 processor, there are seven groups of instructions. They are

1. Data Transfer Instructions:

Data Transfer Instructions defines the data transfer operation.

Example :

MOV reg1, reg2
MOV AL, BL
MOV AX, CX
MOV CX, DX
MOV AH, CH
MOV BH, CL

MOV Register, Indirect Address

Eg: MOV AX, [BX]
MOV CX, [DX]
MOV AL, [BL]
MOV CH, [AH]

MOV Indirect address, Register

Eg: MOV [AX], BX
MOV [AL], BL
MOV [DH], CH
MOV [CL], DH

MOV Register, Memory Location

Eg: MOV AX, [1000]
MOV BX, [1016]
MOV CX, [1032]
MOV DX, [1048]

MOV Memory Location, Register

Eg: MOV [1000], AX
MOV [1016], BX
MOV [1032], CX
MOV [1048], DX

Push Register:

The content of that corresponding register is transferred to stack. In other words, the content of the corresponding register is send to stack.

Example:

Push IP
Push Cs
Push Ax

Push Memory:

The content of that memory is transferred to stack.

Push F:

Content of flag register is transferred to stack.

POP Register:

The content of stack is transferred to corresponding register.

Example:

POP  Es
POP Ip
POP Cx

POP Memory:

The content of the stack is transferred to the corresponding memory.

POP F:

The content of the stack is transferred to the flag register.

XCHG ( Exchange the content of register or memory to corresponding register or memory).

The different modes of XCHG instruction are:

XCHG Register, Register

XCHG AX, BX
XCHG BX, DX
XCHG AL, BL
XCHG AH BH

XCHG Register, Memory

XCHG AX, [1000]
XCHG BX, [1016]
XCHG CX, [1032]
XCHG DX, [1048]

XCHG Memory, Register

XCHG [1000], AX
XCHG [1016], CX
XCHG [1032], BX
XCHG [1048], DX

IN and OUT Instructions:

IN instruction is used to receive data from the peripheral devices to the processor and OUT instruction is used to send data from the processor to the peripheral devices.

Example:

IN AX, [BX]

The data specified in the BX register is transferred to AX register.

IN AX, Address

Example:

IN AX,[DX]
IN AL,[CX]

Data specified in DX register is transferred to Ax register. In other words, the content of port whose address is impeded in the instruction is transferred to AX register.

AAA   -  ASCII adjust after addition
DAA   -  Decimal adjust after addition
AAA and DAA instructions are connected to ADD instruction.
AAS  -  ASCII adjust after subtraction
DAS  -  Decimal adjust after subtraction


2. Arithmetic Instructions:

8086 processor can perform four arithmetic operations.

(a) Addition
(b) Multiplication
(c) Division
(d) Subtraction

(a) Addition:

ADD reg1, reg2
Eg: ADD AL, BL

In the instruction ADD AL, BL, the content of BL is added with the content of AL and the result is stored in AL register.

Eg: ADD AX, BX
ADD CH, DH
ADD CH, CL
ADD AX, CX

ADD Reg, Data

Eg: - ADD AL, 0BH
ADD CL, 0AH
ADD CH, 0DB
ADD DH, 0AC    
              
ADD Register, Memory Location:

Eg:- ADD BX, [1000]
ADD DX, [1016]
ADD CX [1032]
ADD AX, [1048]

ADD Memory Location, Register

Eg: ADD [1000], AX
ADD [1016], BX
ADD [1032], DX
ADD [1048], CX

ADD register, indirect address:

Eg: ADD AX, [BX]
ADD CH, [CL]
ADD AL, [BH]
ADD AH, [CH]

ADD indirect address, Register

Eg:

ADD [AX], BX
ADD [CX], DX

In the instruction, ADD [AX], BX, the content of memory location of BX register is added with AX register and the result is stored in the AX register.

ADC (Add with carry)

For 32 bit addition in 8086 processor can be done by adding the LSB sides at first and with the carry, the remaining MSB is adder4. For this stage, ADC instruction is used.
Eg: ADC AL,BL

The instruction ADC AL, BL means that,
AL = AL +  BL + carry

Types:

ADC reg1, reg2

Eg: ADC AX, BX
ADC AL, BL
ADC BH, DH
ADC CL, DL

ADC Reg, Data

Eg: ADC AX, 0BH
ADC AL, 0AH
ADC BL, 0CH
ADC DX, 0FH

ADC Register, Memory Location:

Eg:
ADC AX, [BX]
ADC CX, [DX]
ADC BH, [CL]
ADC CL, [DL]

ADC Indirect address, register:

Eg: ADC [AX], BX
ADC [CX], DX
ADC [CL], DH
ADC [DH], AH

Subtraction:

Subtraction is denoted by the instruction ‘SUB’.
The instruction SUB AL, BL means that the content of the AL register is subtracted with the content of the BL register and the result is stored in the AL register.

Types:

SUB reg1, reg2
Eg:
SUB AL, BL
SUB AX, BX
SUB CX, DX
SUB CH, DH
SUB DH, CL
SUB AH, CL
SUB BH, DL

SUB Reg, data

Eg: SUB AX, 0AH
SUB BX, 0CH
SUB DX, 0RH
SUB AL, 0BH
SUB CH, 0PH

SUB Register, Memory Location

Eg: SUB BX, [1000]
SUB AX, [1016]
SUB CX, [1032]
SUB DX, [1048]

SUB Memory, Register

Eg: SUB [1000], AX
SUB [1016], BX
SUB [1032], CX
SUB [1048], DX

SUB Register, Indirect Address

Eg: SUB AX, [BX]
SUB BX, [CX]
SUB CX, [AX]
SUB DX, [CX]
SUB AX, [DX]
SUB AL, [BL]
SUB CH, [DH]
SUB DH, [CL]

SUB Indirect address, Register

Eg:
SUB [AX], BX
In the instruction, SUB [AX], BX, the content of memory location of BX register is subtracted with AX register and the result is stored in AX register.
Eg:
SUB [BX], CX
SUB [CX], DX
SUB [AL], BL
SUB [AH], BH
SUB [CL], DH
SUB [DH], AL
SUB [DX], CX
SUB [AL], CL

SBB (Subtract with Borrow)

SBB Instruction is used to perform the operations, which need subtraction with the borrow art.

SBB reg1, reg2

Eg: SBB AL, BL
SBB AH, BH
SBB CH, DL
SBB AX, BX
SBB CX, AX
SBB DX, AX
SBB CL, AL
SBB AL, DH

SBB reg, data

SBB AX, 0BH
SBB BX, 0CH
SBB CX, 0AH
SBB DX, 0DH
SBB AL, 0RH
SBB CH, 0PH
SBB AH, 0XH
SBB DL, 0YH

SBB Memory, Register

SBB [1000], AX
SBB [1016], BX
SBB [1032], DX
SBB [1048], CX

SBB Register, Memory Location

SBB BX, [1000]
SBB AX, [1016]
SBB CX, [1032]
SBB DX, [1048]

SBB register, indirect address

SBB AX, [BX]
SBB CX, [DX]
SBB BX, [DX]
SBB DX, [AX]
SBB AL, [BL]
SBB BL, [DL]
SBB AH, [BH]
SBB CH, [DH]
SBB AL, [BH]
SBB BL, [DH]
SBB DH, [AL]
SBB AH, [CL]

SBB Indirect address, Register

SBB [AX], BX
SBB [CX], DX
SBB [BX], CX
SBB [DX], AX
SBB [AL], BL
SBB [CL], DL
SBB [AH], BH
SBB [DH], CL
SBB [CL], BH
SBB [AL], CH

CMP (Compare Instruction)

CMP Reg1, Reg2

In compare instruction (CMP), the content of source and destination is compared (subtracted) and the data in the source and destination register will not changed. With respect to the carry, the carry flag will set and resets. If there is carry, then the carry flag will set and if there is no carry, the carry flag will resets.

CMP Reg1, Reg2

Eg: CMP AX, BX
CMP CX, DX
CMP AL, BH
CMP AH, BL
CMP BL, DH
CMP BH, AL
CMP AL, BL
CMP DH, CH

CMP Reg, data:

Eg: CMP AX, 0AH
CMP BX, 0BH
CMP CX, 0DH
CMP DX, 0CH
CMP AL, 0PR
CMP BL, 0PH
CMP AH, 0AL
CMP BH, 0BL

CMP Register, Indirect Address

CMP AX, [BX]
CMP BX, [DX]
CMP AL, [BL]
CMP AH, [DH]
CMP AL, [DH]
CMP [CL], [BH]
CMP [CL], [AL]
CMP [AH], [BH]

CMP Indirect Address, Register

CMP [BX], AX
CMP [CX], DX
CMP [AX], BX
CMP [AL], BL
CMP [BL], CL
CMP [AH], BH
CMP [BH], CH
CMP [AH], BL
CMP [BH], DL
CMP [DL], AH
CMP [CL], DH

CMP Memory, Register

CMP [1000], AX
CMP [1016], BX
CMP [1032], CX
CMP [1048], DX

CMP Register, Memory location

CMP AX, [1000]
CMP BX, [1016]
CMP DX, [1032]
CMP CX, [1048]

INC Register:

Eg: INC AL
In the statement, INC AL, the content ‘AL + 1’ is stored in AL location. INC means increment instruction.

INC Memory Location:

Eg:- INC[1000]
Here 1000 à 1000 + 1
ie, INC [1000] will gives the memory location [1001].

INC Data:

Eg: INC 0AH
Here the data, OA + 1 will be obtained.

DEC (Decrement Mode)
DEC register:

Eg: DEC AL
In the instruction, the content of AL – 1 is obtained and stored in AL Location.
Eg: DEC BL
DEC AH
DEC BH
DEC CL
DEC DX
DEC CX

DEC data

Eg: DEC 0AH
DEC 0AH will gives the data (0A - 1) H
Ie, (0A - 1) data is obtained.

DEC Memory Location:

Eg: DEC [1000]
Here the location, 1000 – 1 = 999 is obtained.
Ie, DEC [1000] à [999]

JNC Address:

JNC means that Jump if no carry’. If there is no carry, then JNC instruction will be activated.

JC Address:

JC means that Jump if carry. If there is carry, then JNC instruction will be activated.

Multiplication Instructions:

In order to perform multiplication, MUL instruction is used. In multiplication operation, one data should be in AX register (Accumulator).

MUL Register, Register

MUL AX, BX
MUL BX, CX
MUL AL, CL
MUL AH, DH
MUL AL, DH
MUL AH, BL
MUL AX, [BX]

In the instruction MUL AX, [DX], the memory location of the DX register is multiplied with the AX register and the result is stored in DX AX register.

AAM  - ASCII adjust after multiplication

Division Instructions:

In order to perform division, DIV instruction is used.

3. Logical Instructions:



4. String Manipulation Instructions:


5. Control Transfer Instructions:


6. Processor Control Instructions:



7. Iteration and Interrupt instructions.



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