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Friday, 29 November 2019

Difference between Static Ram and Dynamic Ram


A static RAM essentially contains an array of flip-flops, one for each stored bit. Data written into a flip-flop remains stored as long as a d.c. power is maintained. The memory capacity of a static RAM varies from 64 bits to 1 Mega bit.

Static RAM cell: The logic diagram of a static RAM cell is shown in Fig. 4.5. The cell (or a group of cells) is selected by HIGH values on the ROW and COLUMN lines. The input data bit (1 or 0) is written into the cell by setting the flip-flop for a 1 and resetting the flip-flop for a 0 when the READ/ WRITE’ line is LOW (i.e., write). When the READ/ WRITE’ line is HIGH, the flip-flop is unaffected. It means that the stored bit (data) is gated to the data out line.

The flip-flop in static memory cell can be constructed using Bipolar Junction Transistor (BJT) and MOSFETs that are shown in Fig respectively.
(a) Using Bipolar Transistor
(b) Using MOS Transistor
In a bipolar static RAM cell shown in Fig (a), two BJTs Q1 and Q2, are cross-coupled to form a flip-flop. Here, each transistor has three emitters, namely Row Select input, Column Select input, and Write input. To select the cell, both the row and column select lines must be held HIGH. When selected, a data bit can be stored in the cell (Write operation) or the content of the cell can be read (Read operation). If either row or column select line is LOW, then the memory cell is disabled.
In a MOS stalk RAM cell shown in Fig, Q1 and Q2 act like switches while Q3 and Q4 acts as active load resistors. The transistor Q1 conducts and Q2 is cut off or vice versa. As a static RAM uses a flip-flop as the basic memory cell, it consists of thousands of flip-flops.


The Dynamic Random Access Memory (DRAM) is the lowest cost, highest density random access memory available. Nowadays, computers use DRAM for main memory storage with the memory sizes ranging from 16 to 256 Mega bytes.

Data are stored as charge on every capacitor, which must be recharged or refreshed thousands of times every second in order to retain the stored charge. These memory devices make use of an integrated MOS capacitor as basic memory cell instead of a flip-flop. The disadvantage is that the MOS capacitor cannot hold the stored charge over an extended period of time and it has to be refreshed every few milliseconds. This requires more circuitry and complicates the design problem. Static RAMs are simpler than dynamic RAMs.

A typical dynamic RAM cell consisting of a single MOSFET and a capacitor is shown in Figure. A dynamic RAM consists of an array of such memory cells. In this type of cell, the transistor acts as a switch. The memory cell also requires MOSFETs for READ and WRITE, gating to operated the cell. Data input is connected for storage by a WRITE control signal.

The dynamic RAM offers reduced power consumption and huge storage capacity in a single memory chip.


Advantages of DRAM over SRAM :

• DRAMs, due to their simple cell structure have 4 times the density of SRAMs. This permits 4 times the memory of SRAMs on a board of the same size.

• The cost of DRAMs for each bit of storage is nearly one-fifth that of SRAMs.

• DRAMs have lower power consumption as compared to SRAMs. So, smaller and cheaper power supplied can be used for DRAMs and also the cost of the overall system can be reduced.

• Because of their high capacity and low power consumption, DRAMs are used in the main internal memory of most personal computers.

Disadvantages of DRAM over SRAM :

• DRAMs are slower in speed and more complex as compared to SRAMs.

• DRAMs require refreshing operation after regular intervals, whereas SRAMs do not require any refreshing.

• DRAMs can not be used where only a small amount of memory, typically less than 64kB and high speed is required.

Difference between Static Ram and Dynamic Ram in tabular form:

Static RAM

Dynamic RAM

1. Stored data is retained as long as power is ON.
1. Stored data gets lost and refreshing is needed.
2. Stored data do not change with time.
2. Stored data changes with time.
3. Consumes more power.
3. Consumes less power.
4. Expensive.
4. Economical.
5. Construction is complex.
5. Construction is simple.
6. Low packing density.
6. High packing density.
7. No refreshing is required and hence the operation is easy.
7. Refreshing is needed with additional memory circuitry and hence complicates the operation.
8. No maintenance is required.
8. Maintenance is required.

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