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Sunday, 30 June 2019

Functional Block Diagram of 8085 Microprocessor

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The internal architecture (Functional Block Diagram of 8085 Microprocessor) is shown in figure.

The following are the functional blocks in the 8085 Microprocessor.

1. Accumulator
2. Temporary register
3. Arithmetic and Logic Unit (ALU)
4. Flag register
5. Instruction Register
6. Instruction Decoder and Machine cycle encoder
7. General purpose registers
8. Stack Pointer
9. Program Counter
10. Incrementer / Decrementer
11. Timing and Control unit
12. Interrupt control
13. Serial I/O control
14. Address buffer and Address / Data buffer

1. Accumulator (A-register)

It is an 8-bit register. It is associated with ALU. The accumulator is also called A-register. During the arithmetic / logic operations, one of the operand is available in Accumulator. The result of the arithmetic / logic operations is also stored in the Accumulator.

2. Temporary (TEMP) register

It is an 8-bit register. It is also associated with ALU. This register is used to hold one of the data (from memory or general purpose registers) during an arithmetic / logic operation.

3. Arithmetic and Logic Unit (ALU)

The Arithmetic and Logic Unit includes Accumulator, Temporary register, arithmetic and logic circuits and flag register. The ALU can perform arithmetic (such as addition and subtraction) and logic operations (such as AND, OR and EX-OR) on 8-bit data. It receives the data from accumulator and or TEMP register. The result is stored in the accumulator. The conditions of the result (such as carry, zero) are indicated in the flags.

4. Flag register

It is an 8-bit register. But only five bits are used. The flag positions in the flag register are shown below.

Flag register of 8085: The flags are affected by the arithmetic and logic operations in the ALU. The flag register is also known as Status register or Condition code register. There are five flags namely Sign (S) flag, Zero (Z) flag, Auxiliary Carry (AC) flag, Parity (P) flag and Carry (CY) flag.

 Sign (S) flag: Sign flag is set (1) if the bit D7 of the result in the accumulator is 1, otherwise it is reset (0). This flag is set when the result is negative. This flag is used only for signed numbers.

 Zero (Z) flag: Zero flag is set (1) if the result in the accumulator is zero, otherwise it is reset (0).

 Auxiliary Carry (AC): Auxiliary Carry flag is set (1) if there is a carry from bit position D3of result in the accumulator, otherwise it is reset (0). This flag is used for BCD operations.

 Parity (P) flag: Parity flag is set (1) if the result in the accumulator has even number of 1s, otherwise it is reset (0).

• Carry (CY) flag: Carry flag is set (1) if the result of an arithmetic operation results in a carry from bit position D7, otherwise it is reset (0). This flag is also used to indicate a borrow condition during subtraction operations.

5. Instruction register

When an instruction is fetched from memory, it is stored in the Instruction register. It is an 8-bit register. This resister cannot be used in the programs.

6. Instruction Decoder and Machine cycle encoding

This unit decodes the instruction stored in the Instruction register. It determines the nature of the instruction and establishes the sequence of events to be followed by the Timing and control unit.

7. General purpose registers

There are six 8-bit general purpose registers namely B, C, D, E, H and L registers. B and C registers are combined together as BC register pair for 16-bit operations. Similarly D and E registers can be used as DE resister pair and H and L as HL register pair. The HL register pair is also used as memory pointer (M-register) for storing 16-bit address in some instructions.There are two more 8-bit temporary registers W and Z. These registers are used to hold data during the execution of some instructions. W and Z registers cannot be used in programs.

8. Stack Pointer (SP)

Stack is a portion of memory (RAM) used as FILO (First In Last Out) buffer. This is mainly used during subroutine operations. Stack Pointer is a 16-bit register used as a memory pointer (16-bit address) for denoting the stack position in memory. The Stack pointer is decremented each time when data is loaded into the stack and incremented when data is retrieved from the stack. Stack pointer always points to the top of the stack memory.

9. Program Counter (PC)

The Program Counter (PC) is a 16-bit register. It is used to point the address of the next instruction to be fetched from the memory. When one instruction is fetched from memory, PC is automatically incremented to point out the next instruction.

10. Incrementer / Decrementer

This unit is used to increment or decrement the contents of the 16-bit registers.

11. Timing and Control unit

The internal clock generator is available in this unit.This unit has the micro programs for all the instructions to carry out the micro steps required in completing the instructions. This unit receives signals from the Instruction decoder and Machine cycle encoding unit and generates control signals according to the micro-program for the instruction.

12. Interrupt control

There are five hardware interrupts available in 8085 Microprocessor namely TRAP, RST 7.5, RST 6.5, RST 5.5 and INTR for interfacing the peripherals with the microprocessor. These interrupts are handled by the Interrupt control unit. INT A signal is generated by the Interrupt control unit as an acknowledgement for an interrupting device. If two or more interrupts occur at the same time, service is given according to the priority basis.

13. Serial I/O control

Serial data is transmitted to the peripherals through SOD pin and received through the SID pin. The SOD and SID pins are handled by the Serial I/O control unit using the SIM and RIM instructions.

14. Address buffer and Address / Data buffer

The Address buffer is an 8-bit unidirectional buffer from which the higher order address bits A8 – A15 leaves the microprocessor to the memory and peripherals. The Address / Data buffer is an 8-bit bidirectional buffer used for sending the lower order address bits A0 – A7 and sending and receiving the data bits D0 – D7 to the memory and peripherals.

Friday, 28 June 2019

Hay Bridge Derivation

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Hay Bridge Derivation

The schematic diagram of the Hay bridge is shown in Figure below. It is a modified form of Maxwell bridge. The difference between Hay bridge and Maxwell bridge is that the resistor R1 is in series with the capacitor in Hay bridge. The unknown inductance Lx and its resistance part are represented by Lx and Rx respectively as shown in the schematic diagram. One of the ratio arm used capacitor C1 and a variable resistance R1. The other two arms have R2 and R3.

The balance condition is obtained as follows:

From the schematic diagram we find that:

Z1 = R1 – (j/ωC1)
Z2 = R2
Z3 = R3
and Z4 = Rx + jωLx


(R1 - (j/ωC1))( Rx + jωLx) = R2 R3

R2 R3 = R1 Rx + jωLxR1 + (Lx/C1) – (jRx/ ωC1)

Taking real terms:

R2 R3 = R1 Rx + (Lx/C1) ------------------------ 1

Taking imaginary terms we have:

Rx/ ωC1 = ωLx R1 ------------------- 2

Both the equations 1 and 2 contain Lx and Rx therefore we must solve these equations simultaneously.

Taking equations 1 and 2 and multiplying equation 1 with ωR1 we have:

ωR1R2R3 = ωR12Rx + Lx ω R1/C1 ------------------ 3

Dividing the equation 2 with C1

Rx/ ωC12 = ωLx R1/ C1--------------------- 4

Subtracting 4 from 3 we have,

ωR1R2R3 - Rx/ ωC12 = ωR12Rx
ωR1R2R3 = ωR12Rx + Rx/ ωC12
ωR1R2R3 = Rx ((1 + ω2 C12R12 )/ ωC12)
Rx = ω2 C12R1R2R3/(1 + ω2 C12R12)

From equation 2
Lx = Rx/ ω2 C1R1
Lx = ω2 C12R1R2R3/(1 + ω2 C12R12) ω2 C1R1
Lx = R2R3 C1/(1 + ω2 C12R12)

The solution yields
Rx = ω2 C12R1R2R3/(1 + ω2 C12R12) ------------------- 5
Lx = R2R3 C1/(1 + ω2 C12R12) ------------------- 6

From the equations 5 and 6, it is seen that they contain the angular velocity (ω). Therefore the frequency of the voltage source must be accurately known as it appears. However this is not true. As we known that Q = 1/ ω C1R1 substituting the value of Q in the equation 6 he expression for Lx becomes:

Lx = R2R3 C1/(1 + (1/Q)2) ---------------- 7

For values of Q greater than ten the term (1/Q)2 will be smaller than 1/100 hence can be neglected.

Therefore:  Lx = R2R3C1------------------- 8

Hay's Bridge Advantages:

1. This bridge gives very easy derivation for unknown inductance for high Q coils and is appropriate for coils having Q greater than 10.

2. The bridge also gives simple derivation for Q.

3. From the expression for Q we find the resistance R1 to be appearing in the denominator. Hence for high Q coils value of R1 must be small. It shows that the bridge requires only a low value of resistor R1, unlike Maxwell bridge which required impractically large value of resistance.

Disadvantages of Hay's Bridge:

This bridge is not suitable for measuring inductance values with Q values smaller than 10. The reason is that the factor (1/Q)2 cannot be neglected in expression (7), in such cases.

Monday, 24 June 2019

Scattering Matrix in Microwave Engineering

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Microwave Hybrid Circuits:

A microwave network or microwave hybrid circuit consist of several microwave devices such as sources, attenuators, filters, amplifiers etc coupled together by transmission lines for the transmission of microwave signal. The point of interconnection of two or more devices is known as a junction. The measurement of z,y,h and ABCD parameter is difficult at microwave frequencies due to following reasons.

1. Non availability of voltage and current measuring equipments.
2. Short circuit not easily achieved for wide range of frequencies.
3. Presence of active devices make the circuit unstable so microwave circuits are analyzed using scattering parameters or ‘S’ matrix. S matrix relates the amplitude of reflected waves with incident waves.

Scattering Matrix in Microwave Engineering :

It is a square matrix which gives all the combinations of power relationship between input and output ports of a microwave junction. The elements of ‘S’ matrix are known as scattering parameters or scattering coefficients.
Microwave 2 port network
Consider the microwave 2 port network.

a1 – amplitude of incident wave at port 1
a2 – amplitude of incident wave at port 2
b1 – amplitude of reflected wave at port 1
b2 – amplitude of reflected wave at port 2

The incident and reflected waves can be related using ‘S‘ matrix as
[b] = [s] [a]

b1 = s11a1 + s12a2
b2 = s21a1 + s22a2

s11 is the reflection coefficient at port 1 when, a2 = 0
s11 = b1/a1 where a2 = 0

s22 is the reflection coefficient at port 2 when, a1 = 0
s22 = b2/a2 where a1 = 0

s12 is the attenuation of wave travelling from port 2 to port 1 when, a1 = 0
s12 = b1/a2 where a1 = 0

s21 is the attenuation of wave travelling from port 1 to port 2 when, a2 = 0
s21 = b2/a1 where a2 = 0

In a microwave network if the incident power is Pi, reflected power is Pr, output power is Pa then, the losses defined are

1. Insertion loss = 10 log (Pi/Po)
2. Transmission loss or attenuation = 10 log((Pi - Pr)/Po)
3. Reflection loss = 10 log (Pi/(Pi - Pr))
4. Return loss = 10 log (Pi/Pr)

Properties of S matrix:

1. S matrix is always a square matrix of order n x n.

2. Under perfect match condition the diagonal elements of S matrix are zero.

3. S matrix is always symmetric. ie, Sij = Sji

4. S matrix is an unitary matrix. Ie, [S][S]*= I. where, I is an identity matrix.

5. The sum of product of each term of any row or column multiplied by complex conjugate of corresponding term of another row or column is zero.

6. In a two port network, if the reference plane are shifted from one and two to 1’ and 2’ the new S matrix is given by

This property is known as phase shift property.

7. Since S matrix is symmetric [S]T = [S]

Friday, 21 June 2019

Z Transform of U(n)

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Find the Z Transform and ROC of U(n) ?

The Z transform of a discrete time signal x(n) is given by,

Here given x(n) = u(n)


We know that U(n) = 1; n ≥ 0
                             = 0; n < 0

X(z) = Z0 + Z-1 +Z-2 + Z-3 + Z-4 +………….
        = 1 + Z-1 +Z-2 + Z-3 + Z-4 +………….

It is clear that the infinite series is a Geometric Progression (GP)

The sum of the GP is given by

Sum = First Term / (1 – Common Ratio)

The common ratio (r) is given by

r = second term/first term
  = third term/second term

So, r = Z-1 /1 = Z-2/ Z-1 = Z-1

Hence, the sum of the series is given by

ROC of U(n)

The ROC of U(n) is given by

|r| < 1

|Z-1| < 1

|1/Z| < 1

|Z| > |1|
ROC of U(n)

Thursday, 20 June 2019

Velocity Modulation in Klystron Amplifier

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Klystron Amplifiers:

The 2 cavity klystron amplifier is widely used microwave amplifier, operated by the principles of voltage and current modulators.

Basic Operations:

A high velocity electron beam produced by the accelerating anode is passed through a buncher cavity, drift space, catcher cavity and finally collected by the collector terminals. The electrons injected from the cathode is accelerated by applying a DC voltage ‘Vg’. They arrive at the first cavity that is the buncher cavity or input cavity with uniform velocity. At the buncher cavity these electrons encounter signal voltage or gap voltage. The electrons that pass through the zeros of the gap voltage pass with unchanged velocity. The electrons that pass through positive half cycles of the gap voltage undergo acceleration in velocity. The electrons that pass through negative half cycles of the gap voltage undergo retardation in velocity. (As a result of these the electrons get bunched together as they travelled through the drift space). The variation in electron velocity in drift space is called velocity modulation. (The buncher cavity velocity modulates the electron beam). This electron beam induces a RF current in this field is opposite to the input cavity. Thus the kinetic energy is transferred from the electrons to the field capture cavity. The second cavity is called capture cavity since it captures energy from the bunch electron beam. The electrons emerging from the capture cavity are collected by the collector terminal.

Velocity Modulation in Klystron Amplifier:

The velocity of electrons before entering the buncher cavity is given by,
Vo = 2ev0/m

Where m is the mass of the electron
e is the charge of electron
v0 is the cathode potential

On substituting the values of e and m, the equation reduces to

Vo = 0.596 x 106 (v0)   m/sec ------------- 1

When the microwave signal is applied to the input terminal, the gap voltage is given by

Vs = V1sinωt ----------------- 2

V1 is the amplitude of the signal.
The average transit time through the gap at a distance ‘d’.

Τ = d/Vo = t1 – t0 -------------- 3

Where t0 is the line at which beam reaches the buncher cavity. t1 is the time at which the beam leaves the buncher cavity.

The average transit angle, θg = ω(d/Vo) = ω(t–  t0) ------------ 4

The average microwave voltage in the buncher cavity is

= V1/T ω (cos ωt0 – cos ωt1) ----------------- 5

From eq (4)
ωd/V0 = ω(t1 – t0)

ωt1 = ω(d/Vo + t0) ------------- 6

Subsituting eq (6) in eq (5)

<Vs> = V1/Tω [cosωt0 – cos(ωd/Vo + ωt0)] ------------- 7

Let ωt0 + ωd/2Vo = ωt0 + θg/2 = A
ωd/2Vo = θg/2 = B
A + B = ωt0 + θg/2 + θg/2 = ωt0 + θg 
A – B = ωt0 + θg/2 - θg/2 = ωt0

A + B = ωt0 + θg  ,  A – B = ωt0   ----------------- 8

Substitute eq (8) in eq (7)

<Vs> = V1/Tω [cos(A - B) – cos(A + B)]
         = 2V1/Tω.  sin A sin B
         =  2V1/Tω.  sin (ωt0 + θg  ) sin (θg/2)

Let ωT = θg

Therefore, <Vs> = 2V1/ θg.  sin (ωt0 + θg  ) sin (θg/2)
                    <Vs> =  V1 βi sin (ωt0 + θg/2)

βi = sin (θg/2)/g/2)

Tuesday, 18 June 2019

Bunching Process in Microwave

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Bunching Process in Microwave:

Once the electrons leave the buncher cavity, they drift with a velocity along the space between two cavities. The effect of velocity modulation produces, bunching of electron beam or current modulation. The electrons that pass the buncher cavity with zero voltage travel with unchanged velocity and become the bunching centre. Electrons that pass the bunching cavity during positive half cycles of microwave input become faster and electrons that pass during the negative half cycle become slower.
Bunching Distance

ta = time at which maximum retardation occur
tb = time at which electrons have uniform velocity
tc = time at which maximum acceleration occur

Bunching centre is the point at which electron density is maximum. The distance to the bunching centre,

ΔL = Vo(td - tb) ---------------------- (1)
tc = tb + (π/2ω),
tb = ta + (π/2ω),
ta = tb - (π/2ω)   ------- (2)

The distance of electron at ta,
Δt = Vmin (td - ta) = Vmin(td – tb + (π/2ω)) ----------- (3)

The distance of electron at ta,
Δt = Vmax (td - tc) = Vmax(td – tb – (π/2ω)) ----------- (4)

Let Vmin = Vo[1 – βiVi/2Vo] ------------ (5)
Vmax = Vo[1 + βiVi/2Vo] ------------ (6)

Substitute eqn 5 in eqn 3

Δt = Vo[1 + βiVi/2Vo] (td – tb + (π/2ω))
Δt = [Vo+ βiVi Vo /2Vo] (td – tb + (π/2ω))
Δt = Vo td - Vo tb + Vo(π/2ω) - td βiVi/2 + tb βiVi/2 - βiVi π/4ω ------ (7)

Substitute eqn 6 in eqn 4

Δt = Vo[1 + βiVi/2Vo] (td – tb – (π/2ω))
Δt = Vo td – Vo tb – Vo (π/2ω)) + td βiVi/2 – tb βiVi/2 - βiVi π/4ω ------ (8)

The necessary condition at which electrons meet at a distance ΔL is,

Equating eqn 7 and eqn 8

Vo td - Vo tb + Vo(π/2ω) - td βiVi/2 + tb βiVi/2 - βiVi π/4ω =
Vo td – Vo tb – Vo (π/2ω)) + td βiVi/2 – tb βiVi/2 - βiVi π/4ω

We get,

Vo π/ω = 2βiVi/2 (td – tb)

We have,

iVi)(td – tb) = Vo π/ω
td – tb = Vo π/ω βiVi  ------------------ (9)

Subsitute, eqn (9) in eqn (1)

ΔL = Vo(Vo π/ω βiVi  )

Output Power and Beam Loading:

The difference between the exit and entrance energies must be supplied by the buncher cavity to bunch the electron beam. Thus the electron beam is energised by energy of the cavity. This phenomenon is known as beam loading. The magnitude of induced current under beam loading is given by,

Iind = βoI2
I2 = 2 IoJ1(x)

The output power is given by the equation
Pout = (βoI2)2Rsh/2

Rsh is the Resistance of the catcher cavity
Rsh = V2/ βoI2

Therefore, output power = (βoI2)2/2 x V2/ βoI2

Pout = (βoI2) V2/2

The efficiency of the amplifier is defined by the equation,

η = (βoV2J1(x)/Vo

Wednesday, 12 June 2019

Measurement of Distortion

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There are several methods of measurement of distortion. The important methods are

1. The use of tuned circuit to tune to the frequency component. This is called tunable selective type of measurement.
2. Heterodyne distortion meter or Heterodyne wave analyser.
3. Fundamental suppression method of distortion measurement.

(a) Distortion Measurement Using Tunable Selective Amplifier :

The arrangement for measurement of distortion using tunable selective amplifier is shown in Figure. Input signal reaches the attenuator. The first stage is an emitter follower stage that couples the attenuator to the input of the tunable amplifier. The tunable amplifier is of the R.C. timed type. The output of the amplifier is connected to the electronic voltmeter for indication.
Tunable Selective Type of Distortion Factor Meter
The measurement procedure involves in applying the signal to the input terminals, tuning the R.C. tuned amplifier to the harmonic frequencies and noting the reading in the electronic voltmeter. The meter can be calibrated in terms of R.M.S. distortion.

The attenuator works as a range multiplier and allows application of large signal amplitudes to be analyzed without overloading the amplifier. The calibration can be done by an auxiliary signal generator which applies a known voltage to the input. If the amplifier is designed with constant gain for all the frequencies of the tuning, the attenuator can be set to give the harmonic components directly as a fraction of the fundamental amplitude.

The choice of the R.C. tuned amplifier is because of its wide tuning range and as it does not use coils that complicate the measurement. Also the bandwidth of the response characteristic of the R.C. tuned amplifier is substantially constant percentage over the entire tuning range.

(b) Distortion Measurement Using Heterodyne Wave Analyser :

The block diagram of the heterodyne wave analyser is shown in Figure. A balanced mixer is used which receives its input from the tunable oscillator. The other input to this balance mixer is from the attenuator. The wave to be analysed is passed through the attenuator to the balanced mixer. As the balanced mixer has two inputs, and as it is a nonlinear device, it produces a heterodyne signal. The output of the balanced mixer is applied to a highly selective multistage amplifier. This amplifier has a predetermined fixed response frequency that is higher than any of the frequencies contained in the unknown wave. The output of the selective amplifier is indicated by an electronic voltmeter or equivalent.
Block Diagram of Hetrodyne Wave Analyser
To determine the amplitude of the harmonic component, the local oscillator is adjusted to get the heterodyne frequency produced by the mixer to be equal to the resonant frequency of the selective amplifier. As the input is available at the input of the balanced mixer, the component to be determined has its frequency transformed to the predetermined value of the selective amplifier. Though the other frequency components also produce the corresponding difference signal (beat signal) in the output of the balance mixer, they will be rejected by the highly selective amplifier.

The amplitude of the unknown component of the input signal can be measured by the electronic multimeter. It can as well be calibrated in terms of amplitude. The frequency of the unknown component can readily be known from the frequency to which the local oscillator is tuned to get the required beat signal. Heterodyne wave analysers may use crystal filters or ordinary resonant circuit with high "Q".

(c) Fundamental Supression Method of Distortion Measurement :

R.M.S. distortion can be measured by suppressing the fundamental frequency component of a signal and measuring the remaining part of the signal. When the output is measured by a thermocouple, or square wave electronic voltmeter, the R.M.S. value is realised correctly. However rectifier type of instruments works well with a small error.

The fundamental of a signal can be suppressed using a high pass filter, designed to pass the harmonic only. The filter design must attenuate the fundamental. Alternately bridged T networks balanced to the fundamental frequency and unbalanced for the harmonics can be used. Resonance bridge, Bridge T, Wien Bridge can be employed for this purpose.

The block diagram of fundamental suppression type of distortion factor meter is shown in Figure. The arrangement consists of an attenuator bridge T network and a switch. The output of the bridge T network is given to the output indicator.
Block Diagram for Fundamental Supression Method
The switch S is set to the first position "A" and the input signal is applied. Now the bridge T network is adjusted for the fundamental frequency. Therefore the indication will be low. The switch is now set to position "B" and the attenuator is adjusted to give the same indication as before. It is to be noted that in this position the bridge T network is shorted. The attenuator reading gives the R.M.S. distortion defined in decibles.