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Saturday, 6 October 2018

Integrated Injection Logic Circuit Diagram

We have seen that TTL technology using BJTs is not suitable for high-density VLSI circuits. This is due to the extensive use of large chip-area eating passive components such as resistors, inductors, and capacitors in the circuits to be integrated. Integrated-injection logic family (I2L) is a technology that makes use of only PNP and NPN bipolar junction transistors; use of resistors, capacitors, and inductors are completely avoided in this technology. Also, no isolation is required between individual transistors. With these specialties, it can be seen that the packing density of I2L gates has considerably increased. The basic device in this technology is the multi-collector structure shown in Fig. 3.45(a). This is similar to the multi-emitter TTL structure.

The device is manufactured with the substrate being heavily doped to form an N++ region. Over this, an N epitaxial region is grown, which forms the emitter. We diffuse two P+ regions into this N epitaxial region, one small and one quite large to accommodate as many collectors as required. The smaller P+ region forms the injector terminal. We find that the structure shown in Fig. 3.45(a) consists of a vertical multi-collector NPN transistor T1 driven by the lateral PNP transistor T2.

Figure 3.45(b) shows the circuit details of the I2L gate whose structural form is presented in Fig. 3.45(a). As can be seen from Fig. 3.45(b), the injector terminal is the emitter of the PNP transistor whose base is the N epitaxial layer, which also is the emitter of the NPN transistor. The collector of the lateral transistor is the larger P+ region. The collectors of the NPN transistor are designated as C1 and C2, respectively. Its base is designated as B in Fig. 3.45(b). The N++ terminal (not shown) forms the PNP base and NPN emitter shorted together to earth. Integrated Injection Logic Circuit Diagram is shown below

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