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Sunday, 23 September 2018

NMOS AND-OR-Invert Gate Circuit

NMOS AND-OR-Invert Gate Circuit
NMOS AOI Gate Circuit
Figure 3.25 shows a multiple-logic NMOS gate, called the AND-OR-INVERT (AOI) gate. This is a combination of two NMOS AND gates producing the functions of AB and CD. These two AND gates are connected in parallel so that they perform an ORing operation. This AND-OR function is then NOTed to produce the function Z = (AB+CD)′. As shown in Fig. 3.25, transistors T1 and T2 form one AND operation and T3 and T4 form the other. The parallel combination of these two pairs will produce the desired AOI output.


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