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Friday, 28 September 2018

Advantages and Disadvantages of CMOS Circuit

The following are the advantages and disadvantages of CMOS circuit are as follows.

Advantages of CMOS Logic Gates

1.    Extremely large fan-out capability (>50).
2.    Lowest power dissipation of all gates (a few nW).
3.    Very high noise-immunity and noise-margin (typically, VDD/2) 
4.    Lower propagation delay than NMOS.
5.    Higher speed than NMOS. Currently, computer chips operating at (or more than) 4 GHz are available in the open market.

6.    Large logic swing (=VDD).
7.    Only a single power supply (+ VDD) is required.
8.    Directly compatible with TTL gates.
9.    Temperature stability is excellent.
10.    Low-voltage (1.5 V) chips are now available.

Disadvantages of CMOS Logic Gates

1.    Increased cost due to additional processing steps. But, this is being rectified.
2.    Packing density less than NMOS. Using Pass-Transistor logic structure, packing density comparable to or more than that of NMOS gate is possible.
3.  MOS chips must be protected from acquiring static charges by keeping the leads shorted. Static charges acquired in leads will destroy the chip. At present this problem has been rectified by using built-in protective devices or circuits.

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