Let us now prove that a positive-logic gate is equivalent to its negative-logic complementary gate. For example, a positive-logic OR gate is equivalent to a negative-logic AND gate, and vice versa. These statements are based on the De Morgan’s laws.
Table 2.3 - NOT Function
Table 2.5 - NOR Function
Equivalence of PL OR and NL AND Functions
we had discussed the operation of a two-input OR gate with the help of Table 2.2. We now modify Table 2.2 to get Table 2.6, which explains the operation of the circuit with the help of positive-logic voltage levels. We now define 0-volt level as binary 0 and +V = 5-volt level as binary 1 in the positive-logic system. In Col.
In the same way as described above, in a positive-logic system, wherever the entry is +5 volt, we have its corresponding binary entry as bit 1. Thus in the third row of Col. 1, we find that input switch A is now applied with a voltage of +5 volts. Then, its corresponding binary-equivalent entry in the third row of Col. 2 is bit 1.
Based on the principles described in the above paragraphs, we complete the entries of Table 2.6. By checking the entries of columns 5 and 6 of this table, we find that the circuit shown, indeed performs OR function in the positive-logic system. Hence, the question mark (?) shown in brackets in the heading of Col. 6 of Table 2.6 may be replaced with a plus (+) sign.
Table 2.6 Positive-logic OR gate
Switch A | Switch B | A (?) B | |||
Voltage level | Binary equivalent | Voltage level | Binary equivalent | Voltage level | Binary equivalent |
Column 1 | Column 2 | Column 3 | Column 4 | Column 5 5 | Column 6 |
0 V 0 V +5 V +5 V | 0 0 1 1 | 0 V +5 V 0 V +5 V | 0 1 0 1 | 0 V +5 V +5 V +5 V | 0 1 1 1 |
We now prove that the circuit shown, performs AND operation in the negative-logic system. For this, we first modify Table 2.6 by using voltages to represent the negative-logic levels. The modified truth table is shown in Table 2.7.
In Table 2.7, we find that entries in all the columns under the heading voltage level are exactly the same as those found in Table 2.6. However, the entries in the columns of Table 2.7 under the heading binary-equivalent level differ from those given in Table 2.6. For example, in Table 2.7, we put bit 0 where the voltage level is +5 V and bit 1 where the voltage level is 0 V. Now, inspecting Cols. 5 and 6 of Table 2.7, we find that the circuit shown, indeed is performing an AND operation in the negative-logic scheme. Hence, the question mark (?) shown in brackets in the heading of Col. 6 of Table 2.7 may be replaced with a dot (∙) sign.
Table 2.7 Negative-logic AND gate
Switch A | Switch B | A (?) B | |||
Voltage level | Binary equivalent | Voltage level | Binary equivalent | Voltage level | Binary equivalent |
Column 1 | Column 2 | Column 3 | Column 4 | Column 5 | Column 6 |
0 V 0 V +5 V +5 V | 1 1 0 0 | 0 V +5 V 0 V +5 V | 1 0 1 0 | 0 V +5 V +5 V +5 V | 1 0 0 0 |
Based on the arguments given above, we conclude that positive-logic OR gate is equivalent to negative-logic AND gate and vice versa. Similarly, we can prove that positive-logic NAND gate is equivalent to negative logic NOR gate and vice versa.
Reference:
Table 2.1 - AND Function
A | B | Z = AB |
0 0 1 1 | 0 1 0 1 | 0 0 0 1 |
Table 2.2 - OR Function
A | B | Z = A + B |
0 0 1 1 | 0 1 0 1 | 0 1 1 1 |
Table 2.3 - NOT Function
A | A′ |
0 0 | 0 1 |
Table 2.4 - NAND Function
A | B | Z = (A B)′ |
0 | 0 | 1 |
0 | 1 | 1 |
1 | 0 | 1 |
1 | 1 | 0 |
A | B | Z = (A + B)′ |
0 | 0 | 1 |
0 | 1 | 0 |
1 | 0 | 0 |
1 | 1 | 0 |